Basic Non- Pipelined CPU Architecture
CPU is the part of a computer that does the bulk of data processing operations.
CPU is made up of 3 parts:-
Control Unit:- Supervises the transfer of information among various registers & instruments ALU as to which operations to be performed.
ALU:- It performs required micro-operations for executing instructions.
Register Set:- It stores intermediate data used during instruction execution CPU performs a lot of operations depending upon computer architecture.
Computer Architecture is divided into 2 types :-
(i) RISC (Reduced instruction set computer)
(ii) CISC (Complex instruction set computer)
It can also be divided as:-
(i) Embedded (ii) Non-Embedded.
Embedded Architecture:- It is basically ‘Harvard Computer Architecture’ in which programs & data reside in different memory systems leading to doubling them. Ex⇨ Microcontroller-based system & Digital signal processor-based (DSP) system.
Non-Embedded Architecture:- It is basically Stored program computer(SPC) Architecture, where programs & data reside in the same memory & system.
Ex⇨ Desktop or PCs.
Computer designers & programmers commonly view the instruction which is the boundary between both approaches.
From the designer's point of view, the computer instruction set provides the specifications for the design of the CPU, which including choosing hardware.
From the programmer's point of view, important things are register set, memory structure, type of data supported by instructions, etc.
Design of computer system depends upon user application with well-defined specifications of the design.
Several applications for which CPU can be designed are:-
(i) Mobile Computing (ii) I/O processing
(iii) Numeric processing (iv) Network processing
(v) Real-Time Embedded Applications.
Each CPU has its own architecture, ISA, addressing modes & instruction types for its performance.
Different types of CPU Organizations are:-
(i) Accumulator Based Architecture
(ii) General Register Based Architecture
(iii) Stack Register Based Architecture
(iv) Memory Stack Based Architecture.
Accumulator Based Organization:-
This kind of CPU or computer architecture is based on using a special fast register known as ‘accumulator(AC) does bulk of operations.
Operations usually take place between the contents of AC & operands in the instructions.
The end result of any operation is initially stored in AC, & from there it may be sent to memory or I/O devices.
Ex EDSAC is an AC-based CPU or Intel 8085-CPU or Z-80.
Instructions here are usually 1-address instruction that uses AC. Ex- ADD X //AC <- AC +M[X]
A small AC-Based CPU
R- Address Register IR- Instruction Register
C- Program Counter DR- Data Register
AC- AC Register
As shown by the diagram, there are many registers in the CPU, but AC plays the central role.
The Organisation is typical of 1st generation computers.
For simplicity, it is assumed that instructions & data have fixed word size ‘n’ bits.
Instructions are fetched by PCU, whose main register is PC.
Data is executed in DPU, which contains ALU & 2-data registers AC & DR.
Most instructions perform operations of form:
X1=fi(X1, X2), where X1 & X2 denote a CPU register (AC,DR or PC) extension memory.
IR stores current instructions while PC stores the address of the next instruction which is next in line for execution.
Instructions are fetched from the system bus (from AM), the opcode is loaded into IR & adder of operands is loaded into AR.
Instructions begin instruction fetch operation & loaded into PC. CPU proceeds to decode & execute it.
Load instruction AC=M(address)
Store instruction M(address)= AC
AC based CPUs normally use ‘Load/Store architecture’
Ex-> LD X // AC <- M[X]
MOV DR AC // DR <- AC
LD Y // AC <- M[Y]
ADD DR // AC <- AC+ DR
ST Z // M[Z] <- AC
Is shortened as LD X
Accumulator originally meant a device that combined the functions of memory storage & addition.
Any Quantity transferred to AC was auto-added to its contents.
But now AC may be used for a variety of operations like MUL, DIV, SUB, NOT, BR (Branch), BZ (Branch if AC =0), etc.